VXI SM8000 - Manual (Page 73)

VXI Technology, Inc.
SM8000 Series Index 73
I
NDEX
A
A16 address space.............................................................39
A16 base address ..............................................................37
A16 offset register ............................................................37
A16 offset register address ...............................................37
A24 address space.............................................................37
A24 base address ..............................................................37
A24/A32 active.................................................................39
A24/A32 enable ................................................................40
A24/A32 memory offset ...................................................40
A32 address space.............................................................37
A32 base address ..............................................................37
access LED fail bit............................................................49
ACFAILN enable bit ........................................................48
address space ..............................................................23, 39
B
backplane jumpers ............................................................21
BBM/MBB Bit .................................................................49
BBM/MBB Enable Bit .....................................................49
C
cable..................................................................................10
cause/status .......................................................................41
command parsing..............................................................37
configuration registers ......................................................48
cooling ..............................................................................21
D
data bus.............................................................................50
delay timer ........................................................................49
device class .......................................................................39
dynamic configuration ......................................................39
E
electric shock ................................................................9, 10
electrical overload...............................................................9
explosive atmosphere........................................................10
extended memory device ..................................................41
extended memory space....................................................23
F
firmware version number..................................................40
frame or chassis ground ......................................................9
front panel open signal set by this module........................51
G
grounding conductor .........................................................10
H
handler IRQ Line ..............................................................41
hardware revision code ............................. 51, 52, 53, 55, 56
I
IH ENA* .......................................................................... 41
interrupt mask .................................................................. 41
interrupter IRQ line .......................................................... 41
IR ENA* .......................................................................... 41
IRQ line............................................................................ 41
L
logical address................................................ 21, 22, 23, 39
LSB (least significant bit) .......................................... 22, 23
M
major hardware version number....................................... 40
manufacturer's ID ............................................................. 39
memory space .................................................................. 48
message-based.................................................................. 37
minor hardware version number....................................... 40
model code ....................................................................... 39
MODID* .......................................................................... 39
module relay address........................................................ 54
MSB (most significant bit) ......................................... 22, 23
O
offset register.................................................................... 37
offset value....................................................................... 37
openbus out enable bit...................................................... 50
overheating....................................................................... 10
P
polled fashion ................................................................... 41
power................................................................................ 21
power cord.................................................................... 9, 10
power source ...................................................................... 9
probes ............................................................................... 10
R
rating fuse........................................................................... 9
register address................................................................. 37
registers ...................................................................... 37, 39
relay control ..................................................................... 54
relay data read back polarity bit ....................................... 48
relay register address.................................................. 54, 55
relay register offset........................................................... 54
relay reset enable bit ........................................................ 49
relay reset select bit.......................................................... 50
required memory .............................................................. 39
reset .................................................................................. 40
S
serial clock ....................................................................... 42
specified voltage ................................................................ 9
sysfail inhibit.................................................................... 40