Texas Instruments TMS320C64X User Manual
Page 77
DSP_fir_r8
4-49
C64x+ DSPLIB Reference
Implementation Notes
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Bank Conflicts: No bank conflicts occur.
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Interruptibility: The code is interruptible.
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The load double-word instruction is used to simultaneously load four
values in a single clock cycle.
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The inner loop is unrolled 4 times and will always compute a multiple of
4 output samples.
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The outer loop is conditionally executed in parallel with the inner loop. This
allows for a zero overhead outer loop.
Benchmarks
Cycles
nh*nr/4 + 17
Codesize
336 bytes