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Texas Instruments TMS320C64X User Manual

Page 116

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DSP_minerror

4-88

Special Requirements Array GSP0_TABLE[] must be double-word aligned.

Implementation Notes

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Bank Conflicts: No bank conflicts occur.

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Interruptibility: The code is interrupt-tolerant but not interruptible.

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The load double-word instruction is used to simultaneously load four
values in a single clock cycle.

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The inner loop is completely unrolled.

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The outer loop is 4 times unrolled.

Benchmarks

Cycles

256/4 * 9 + 17 = 593

Codesize

352 bytes