Texas Instruments TMS320C64X - Manual (Page 160)

Glossary
C-6
H
HAL: Hardware abstraction layer of the CSL. The HAL underlies the service
layer and provides it a set of macros and constants for manipulating the
peripheral registers at the lowest level. It is a low-level symbolic interface
into the hardware providing symbols that describe peripheral
registers/bitfields, and macros for manipulating them.
host: A device to which other devices (peripherals) are connected and that
generally controls those devices.
host port interface (HPI): A parallel interface that the CPU uses to
communicate with a host processor.
HPI: See host port interface; see also HPI module.
I
index: A relative offset in the program address that specifies which frame is
used out of the 512 frames in the cache into which the current access is
mapped.
indirect addressing: An addressing mode in which an address points to
another pointer rather than to the actual data; this mode is prohibited in
RISC architecture.
instruction fetch packet: A group of up to eight instructions held in memory
for execution by the CPU.
internal interrupt: A hardware interrupt caused by an on-chip peripheral.
interrupt: A signal sent by hardware or software to a processor requesting
attention. An interrupt tells the processor to suspend its current
operation, save the current task status, and perform a particular set of
instructions. Interrupts communicate with the operating system and
prioritize tasks to be performed.
interrupt service fetch packet (ISFP): A fetch packet used to service
interrupts. If eight instructions are insufficient, you must branch out of this
block for additional interrupt service. If the delay slots of the branch do
not reside within the ISFP, execution continues from execute packets in
the next fetch packet (the next ISFP).
interrupt service routine (ISR): A module of code that is executed in
response to a hardware or software interrupt.