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Cpu core – arm926ej-s, 16k i-cache, 16k d-cache – Texas Instruments MICROPROCESSOR TI SITARA User Manual
Page 22: 64k rom, 8k ram (vector table), Arm interrupt controller, Includes mmu, Boot rom, Inputs, Configurable priority
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Cpu core – arm926ej-s, 16k i-cache, 16k d-cache | 64k rom, 8k ram (vector table), Arm interrupt controller, Includes mmu, Boot rom, Inputs, Configurable priority | Texas Instruments MICROPROCESSOR TI SITARA User Manual | Page 22 / 43
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