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Table 8.7 reset timing values, Datasheet – SMSC USB3290 User Manual

Page 35

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Small Footprint Hi-Speed USB 2.0 Device PHY with UTMI Interface

Datasheet

SMSC USB3290

35

Revision 1.5 (11-02-07)

DATASHEET

Figure 8.5 HS Detection Handshake Timing Behavior (HS Mode)

Table 8.7 Reset Timing Values

TIMING

PARAMETER

DESCRIPTION

VALUE

T0

HS Handshake begins. DP pull-up enabled, HS
terminations disabled.

0 (reference)

T1

Device asserts Chirp K on the bus.

T0 < T1 < HS Reset T0 + 6.0ms

T2

Device removes Chirp K from the bus. 1 ms
minimum width.

T0 + 1.0ms < T2 <
HS Reset T0 + 7.0ms

T3

Downstream facing port asserts Chirp K on the
bus.

T2 < T3 < T2+100µs

T4

Downstream facing port toggles Chirp K to Chirp J
on the bus.

T3 + 40µs < T4 < T3 + 60µs

T5

Downstream facing port toggles Chirp J to Chirp K
on the bus.

T4 + 40µs < T5 < T4 + 60µs

T6

Device detects downstream port chirp.

T6

T7

Chirp detected by the device. Device removes DP
pull-up and asserts HS terminations, reverts to HS
default state and waits for end of reset.

T6 < T7 < T6 + 500µs

T8

Terminate host port Chirp K-J sequence (Repeating
T4 and T5)

T9 - 500µs < T8 < T9 - 100µs

T9

The earliest time at which host port may end reset.
The latest time, at which the device may remove
the DP pull-up and assert the HS terminations,
reverts to HS default state.

HS Reset T0 + 10ms