FUJITSU MPB3052AT User Manual
Page 13
C141-E045-02EN
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5.4
Protocol for command abort ........................................................................................... 5 - 58
5.5
WRITE SECTOR(S) command protocol........................................................................ 5 - 59
5.6
Protocol for the command execution without data transfer ............................................ 5 - 60
5.7
Normal DMA data transfer ............................................................................................. 5 - 62
5.8
Ultra DMA termination with pull-up or pull-down ........................................................ 5 - 73
5.9
PIO data transfer timing.................................................................................................. 5 - 75
5.10
Single word DMA data transfer timing .......................................................................... 5 - 76
5.11
Multiword DMA data transfer timing (mode 2) ............................................................. 5 - 77
5.12
Initiating an Ultra DMA data in burst............................................................................. 5 - 78
5.13
Sustained Ultra DMA data in burst................................................................................. 5 - 81
5.14
Host pausing an Ultra DMA data in burst ...................................................................... 5 - 82
5.15
Device terminating an Ultra DMA data in burst ............................................................. 5 - 83
5.16
Host terminating an Ultra DMA data in burst................................................................. 5 - 84
5.17
Initiating an Ultra DMA data out burst........................................................................... 5 - 85
5.18
Sustained Ultra DMA data out burst............................................................................... 5 - 86
5.19
Device pausing an Ultra DMA data out burst................................................................. 5 - 87
5.20
Host terminating an Ultra DMA data out burst............................................................... 5 - 88
5.21
Device terminating an Ultra DMA data out burst ........................................................... 5 - 89
5.22
Power-on Reset Timing .................................................................................................. 5 - 90
6.1
Response to power-on .................................................................................................... 6 - 2
6.2
Response to hardware reset ............................................................................................ 6 - 3
6.3
Response to software reset.............................................................................................. 6 - 4
6.4
Response to diagnostic command .................................................................................. 6 - 5
6.5
Address translation (example in CHS mode).................................................................. 6 - 7
6.6
Address translation (example in LBA mode) ................................................................. 6 - 8
6.7
Sector slip processing ..................................................................................................... 6 - 11
6.8
Alternate cylinder assignment ........................................................................................ 6 - 12
6.9
Data buffer configuration ............................................................................................... 6 - 13