FUJITSU MB15E07SL - Manual (Page 4)

MB15E07SL
4
■ BLOCK DIAGRAM
Clock
Data
fin
LE
OSC OUT
OSC
IN
PS D O
V P
φ
R
LD
/
fout
φ
P
Prescaler
32/33
64/65
Xfin
GND
V CC
MD
ZC
C
N
T
SW FC CS LDS
fr
fp
. .
. . . . . .
(16)
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(15)
(14)
(13)
(12)
(11)
(10)
(9)
(8)
16
15
14
13
12
11
10
9 8
7
6
5
4
3
2
1
Reference
oscillator
circuit
Binary 14-bit
reference counter
Phase
comparator
Lock
detector
LD/fr/fp
selector
Charge pump Current switch
14-bit latch
7-bit latch
Intermittent
mode control
(power save)
11-bit latch
1-bit
control
latch
4-bit latch
19-bit shift register
Binary 7-bit
swallow counter
Binary 11-bit
programmable
counter
: SSOP
( ) : BCC