Zilog Z16C30 - Manual (Page 162)

8-7
Z16C30 USC ®
U SER ' S M ANUAL Z ILOG
UM97USC0100
D7 D6 D5 D4 D3 D2 D1 D0 D15 D14 D13 D12 D11 D10 D9 D8
0
RxC Pad Output
CTR0 Enable
/Rx Clock
CTR0 Clock
/Tx Clock
CTR1 Clock
DPLL Clock
0
RxC Output Enable
0
BRG0 Clock
BRG1 Clock
TxC Output Enable
TxC Pad Output
CTR1 Enable
Figure 8-1. Test Mode Data Register with TMCR 4-0=00101 (Clock Mux Outputs)
UM009402-0201