Panasonic KX-P1150 - Manual (Page 38)

KX-P1150
8.4 IC Pin Configuration
8.4.1 Logic Symbol Chart
Positiva Logic Negative Logic Truth Table Positive Logic Negativa Logic Truth Table
NOT NANO
!-[>-(
C = A
A^[^C
C = A
A
c
L H
H L
INVERT-OR
SO-
c = XB
C = *+B
BUFFER
A-l C
C = A C = A
A C
L L
H H
OR
A
B O-
INVERT-NAND
A
B
C = A + B
i>=
c=/fS
AND INVERT-NOR
so-
C-AB C = A + B
A B C
L L L
L H L
H L L
H H H
NOR
Si><
c=>rrB
INVERT-AND
C = A6
8.4.2 Pin Configuration
S 5 i ! ~ : : ° 8 S o 8 ^
F K 2 S S S S S 2 SJ;]
v - O C O C S J v - O O C > J » - Q f / > r r . - v ^ « ’ ' ^ C O C V I v -
' 4 - T r r » r > . r ' . h » L D y 3 < D S U ) £ C l « j T - v - » - t - , -
a . Q . 0 . a . Q . C L 0 . Q . Q . Q . C C S C C O 4 S < < < <
□ AIO
A8
X2
□ XI
3 Vss(GND)
D ALE
□ AD7
□ AD6
A04
□ AD3
PJVIGP0901
IC200 CPU
TMP90C845F