COMMELL MPX-2515 - Manual (Page 36)

Commell MPX-2515 User’s Guide Rev 0100
Taiwan Commate Computer Inc. 36
Figure 8 MCP2515 Bit Modify Instruction
The following registers can be modified by the Bit Modify Instruction. Please refer
to the MCP2515 data sheet for detail information.
•
BFPCTRL (0X0C): RXnBF Pin Control and Status Register
•
TXRTSCTRL (0X0D): TXnRTS Pin Control and Status Register
•
CANCTRL (0X0F): CAN Control Register
•
CNF3 (0X28): Configuration 3 Register
•
CNF2(0X29): Configuration 2 Register
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CNF1(0X2A): Configuration 1 Register
•
CANINTE (0X2B): Interrupt Enable Register
•
CANINTF (0X2C): Interrupt Flag Register
•
EFLG (0X2D): Error Flag Register
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TXB0CTRL (0X30): Transmit Buffer 0 Control Register
•
TXB1CTRL (0X40): Transmit Buffer 1 Control Register
•
TXB2CTRL (0X50): Transmit Buffer 2 Control Register
•
RXB0CTRL (0X60): Receive Buffer 0 Control Register
•
RXB1CTRL (0X70): Receive Buffer 1 Control Register
/* command category code */
#define CCP_CAN_BIT_MODIFY_SERVICE 0X26
#define EP2 2 /* Endpoint 2 */
OFFSET BULK OUT (EP2) BULK IN (EP1)
SIZEOF_DATA 0X03 N/A
COMMAND 0X26
ERROR 0X00
DATA_0 Bit Modifiable register