MSI Z77A-G41 - Manual (Page 53)

2-13
MS-7758
Chapter 2
DRAM Tmng Mode
Select whether DRAM tmng s controlled by the SPD (Seral Presence Detect) EE-
PROM on the DRAM module. Settng to [Auto] enables DRAM tmngs and the followng
“Advanced DRAM Configuraton” sub-menu to be determned by BIOS based on the
configuratons on the SPD. Selectng [Lnk] or [Unlnk] allows users to configure the
DRAM tmngs for each channel and the followng related “Advanced DRAM Configura-
ton” sub-menu manually.
Advanced DRAM Configuraton
Press to enter the sub-menu.
Command Rate
Ths settng controls the DRAM command rate.
tCL
Controls CAS latency whch determnes the tmng delay (n clock cycles) of startng
a read command after recevng data.
tRCD
Determnes the tmng of the transton from RAS (row address strobe) to CAS (col-
umn address strobe). The less clock cycles, the faster the DRAM performance.
tRP
Controls number of cycles for RAS (row address strobe) to be allowed to pre-charge.
If nsufficent tme s allowed for RAS to accumulate before DRAM refresh, the DRAM
may fal to retan data. Ths tem apples only when synchronous DRAM s nstalled
n the system.
tRAS
Determnes the tme RAS (row address strobe) takes to read from and wrte to mem-
ory cell.
tRFC
Ths settng determnes the tme RFC takes to read from and wrte to a memory
cell.
tWR
Determnes mnmum tme nterval between end of wrte data burst and the start of a
pre-charge command. Allows sense amplfiers to restore data to cell.
tWTR
Determnes mnmum tme nterval between the end of wrte data burst and the start
of a column-read command; allows I/O gatng to overdrve sense amplfies before
read command starts.
tRRD
Specfies the actve-to-actve delay of dfferent banks.
tRTP
Tme nterval between a read and a precharge command.
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