Asus M3N78-CM - Manual (Page 51)

Chapter 2: BIOS setup 2-15
tWRWR [ Auto]
Allows you to specify the Twrwr time. Configuration options: [Auto] [0 CLK] [1 CLK] [2
CLK] [3 CLK]
tRDRD [ Auto]
Allows you to specify the Trdrd time. Configuration options: [Auto] [2 CLK] [3 CLK] [4
CLK] [5 CLK]
tRFC0/1/2/3[ Auto]
Allows you to specify the Trfc0/1/2/3 time. Configuration options: [Auto] [75ns] [105ns]
[127.5ns] [195ns] [327.5ns]
Memory Over Voltage [Auto]
Allows you to set the Memory Over Voltage. Use +/- to adjust the voltage. The increment is
0.00625V. The standard value is 1.85000V. Configuration options: [Auto] [Min = 1.850000V]
[Max = 2.24375V]
Chipset Voltage:
Chipset Voltage [Auto]
Allows you to set the Chipset Voltage.
Configuration options: [Auto][+ 50mv] [+ 100mv] [+ 150mv]
2.4.2 CPU Configuration
GART Error Reporting [Disabled]
This option should remain disabled for the normal operation. The driver developer may
enable it for testing purpose. Configuration options: [Disabled] [Enabled]
Microcode Updation [Enabled]
Allows you to enable or disable the microcode updation.
Configuration options: [Disabled] [Enabled]
Secure Virtual Machine Mode [Enabled]
Allows you to enable or disable the AMD Secure Virtual Machine mode.
Configuration options: [Disabled] [Enabled]
Cool ‘n’ Quiet [Enabled]
Allows you to enable or disable the generation of ACPI_PPC, _PSS, and _PCT objects.
Configuration options: [Disabled] [Enabled]
2.4.3 Chipset
The Chipset menu allows you to change the advanced chipset settings. Select an item then
press to display the sub-menu.
NorthBridge Configuration
Memory Configuration
Bank Interleaving [Auto]
Allows you to enable the bank memory interleaving.
Configuration options: [Disabled] [Auto]
Channel Interleaving [Disabled]
Allows you to enable the channel memory interleaving.
Configuration options: [Disabled] [Address bits 6] [Address bits 12] [XOR of Address
bits [20:16,6] ] [XOR of Address bits [20:16,9] ]