AAEON FWS-7400 - Manual (Page 51)

N e t w o r k Ap p l i a n c e F W S - 7 4 0 0
None
Even
Odd
Mark Parity
Space
A parity bit can be sent with the data bits to detect some transmission errors. Even:
parity bit is 0 if the num of 1’s in the data bits is even. Odd: parity bit is 0 if num of
1’s in the data bits is odd. Mark: parity bit is always 1. Space: Parity bit is always 0.
Mark and Space Parity do not allow for error detection.
1 Stop Bits
2
Stop bits indicate the end of a serial data packet. ( A start bit indicates the
beginning). The standard setting is 1 stop bit. Communication with slow devices
may require more than 1 stop bit.
None Flow Control
Hardware RTS/CTS
Flow control can prevent data loss from buffer overflow. When sending data, if the
receiving buffers are full, a ‘stop’ signal can be sent to stop the data flow. Once the
buffers are empty, a ‘start’ signal can be sent to re-start the flow. Hardware flow
control uses two wires to send start/stop signals.
Chapter 3 AMI BIOS Setup 3-15