AAEON GENE-QM87 - Manual (Page 28)

S u b C o m p a c t B o a r d G E N E - Q M 8 7
Chapter 2 Quick Installation Guide 2-15
Pin Pin Name Signal Type Signal Level
1
SMB_DATA I/O +3.3V
2
GND GND
3
SMB_CLK I/O +3.3V
4
GND GND
5
PS_ON# OUT +3.3V
6
+5VSB PWR +5V
2.19 LVDS Port 2 Inverter / Backlight Connector (CN2)
BLK_PWR
2
3
4
5
1
BKL_CONTROL
GND
GND
BKL_ENABLE
Pin Pin Name Signal Type Signal Level
1
BKL_PWR PWR +5V / +12V
2
BKL_CONTROL OUT
3
GND GND
4
GND GND
5
BKL_ENABLE OUT +5V
Note
: LVDS2/BKL_PWR can be set to +5V or +12V by JP7.
LVDS2/BKL_CONTROL can be set by JP8.
The driving current supports up to 2A.