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Bios setup, 1 chip configuration – Asus X900-PI4 User Manual

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ASUS P4T User’s Manual

60

4. BIOS SETUP

4. BIOS SETUP

Chip Configuration

4.4.1 Chip Configuration

RDRAM Pool B State [Nap]

This sets the operating state of the RDRAM devices in Pool B. Selecting [Nap]
allows the RDRAM in Pool B to enter power-saving mode. [Standby] allows the
RDRAM in Pool B to return to the working state quickly.

AGP Fast-Write [Enabled]

This controls the AGP fast-write function. Configuration options: [Enabled] [Dis-
abled]

Graphics Window Size [64MB]

This feature allows you to select the size of mapped memory for AGP graphic data.
Configuration options: [4MB] [8MB] [16MB] [32MB] [64MB] [128MB] [256MB]

Video Memory Cache Mode [UC]

USWC (uncacheable, speculative write combining) is a new cache technology for
the video memory of the processor. It can greatly improve the display speed by
caching the display data. You must set this to UC (uncacheable) if your display card
cannot support this feature; otherwise your system may not boot. Configuration op-
tions: [UC] [USWC]

Memory Hole At 15M-16M [Disabled]

This field allows you to reserve an address space for ISA expansion cards that re-
quire it. Setting the address space to a particular setting will make that memory
space unavailable to the system. Expansion cards can only access memory up to
16MB. Configuration options: [Disabled] [Enabled]

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