Rainbow Electronics MAX767 - Manual (Page 14)

MAX767
Proper circuit operation requires that the short-circuit
current be at least I
LOAD x (1 + LIR / 2). However, the
standard application circuits are designed for a short-
circuit current slightly in excess of this amount. This
excess design current guarantees proper start-up
under constant full-load conditions and proper full-load
transient response, and is particularly necessary with
low input voltages. If the circuit will not be subjected to
full-load transients or to loads approaching the full-load
at start-up, you can decrease the short-circuit current
by increasing R1, as described in the Current-Sense
Resistor section. This may allow use of MOSFETs with a
lower current-handling capability.
Heavy-Load Efficiency
Losses due to parasitic resistances in the switches,
coil, and sense resistor dominate at high load-current
levels. Under heavy loads, the MAX767 operates deep
in the continuous-conduction mode, where there is a
large DC offset to the inductor current (plus a small
sawtooth AC component) (see Inductor section). This
DC current is exactly equal to the load current, a fact
which makes it easy to estimate resistive losses via the
simplifying assumption that the total inductor current is
equal to this DC offset current. The major loss mecha-
nisms under heavy loads, in usual order of importance,
are:
• I 2 R losses
• gate-charge losses
• diode-conduction losses
• transition losses
• capacitor-ESR losses
• losses due to the operating supply current of the IC.
Inductor-core losses, which are fairly low at heavy
loads because the AC component of the inductor cur-
rent is small, are not accounted for in this analysis.
P OUT
Efficiency = ______ x 100% =
P IN
P OUT
_______________ x 100%
P
OUT
+ PD
TOTAL
PD TOTAL = PD (I 2 R) + PD GATE + PD DIODE +
PD TRAN + PD CAP + PD IC
I 2 R Losses
PD (I 2 R) = resistive loss = (I LOAD
2 ) x
(R COIL + r DS(ON) + R1)
where R COIL is the DC resistance of the coil and
r DS(ON) is the drain-source on resistance of the MOS-
FET. Note that the r DS(ON) term assumes that identical
MOSFETs are employed for both the synchronous recti-
fier and high-side switch, because they time-share the
inductor current. If the MOSFETs are not identical, esti-
mate losses by averaging the two individual r
DS(ON)
terms according to their duty factors: 0.66 for N1 and
0.34 for N2.
Gate-Charge Losses
PD GATE = gate driver loss = q G x f x 5V
where q G is the sum of the gate charge for low- and
high-side switches. Note that gate-charge losses are
dissipated in the IC, not the MOSFETs, and therefore
contribute to package temperature rise. For a pair of
matched MOSFETs, q
G is simply twice the gate capaci-
tance of a single MOSFET (a data sheet specification).
Diode Conduction Losses
PD DIODE = diode conduction losses =
I LOAD x V D x t D x f
where V D is the forward voltage of the Schottky diode
at the output current, t D is the diode’s conduction time
(typically 110ns), and f is the switching frequency.
Transition Losses
PD TRAN = transition loss =
V IN
2 x C RSS x I LOAD x f
______________________
I DRIVE
where C RSS is the reverse transfer capacitance of the
high-side MOSFET (a data sheet parameter), f is the
switching frequency, and I
DRIVE is the peak current
available from the high-side gate driver output (approx-
imately 1A).
Additional switching losses are introduced by other
sources of stray capacitance at the switching node,
including the catch-diode capacitance, coil interwind-
ing capacitance, and low-side switch drain capaci-
tance, and are given as PD
SW = V IN
2 x C STRAY x f, but
these are usually negligible compared to C RSS losses.
The low-side switch introduces only tiny switching loss-
es, since its drain-source voltage is already low when it
turns on.
5V-to-3.3V, Synchronous, Step-Down
Power-Supply Controller
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