Rainbow Electronics APC5800M - Manual (Page 5)

INTEGRATED CIRCUITS INC.
http://www.aplusinc.com.tw PAGE / 5 VER1.3 5
3FEE
low byte data of Timer B. Read and write
3FEF
high byte data of Timer B. Read and write
After timer_b is enabled, the timer will start to count down. When timer counts to zero,
the timer will count from the initial value and timer_b NMI will happen.
The time elapsing = (($3FEF,$3FEE)+1) / (Timer B input clock)
3FF0
direction register of Port_a[15..8]. Write only
A ‘1’ in this register will set the corresponding pin of port_a to be output.
The default value for each bit is zero.
3FF1
data register of Port_a[15..8]. Read and write
3FF2
data register of Port_b[11..8]. Write only
Bit 3-0: pin 11 to pin 8 of Port_b
Bit 7-4 : Reserved
3FF4
Bank register for CPU. Write only
3FF5
MSB bit in bank register for CPU. Write only
Bank register is a 9-bit register ($3FF5 bit0 and $3FF4 bit7-0).
The memory range of bank is from $4000 to $7FFF.
Bit 1: Reserved.
Bit 2: = 1 (Voice0 buffer is transferred to DAC port directly.) (Default)
0 (Voice0 buffer will be transferred to DAC port when timer_b NMI happen.)
Bit 7-3 : Reserved.
3FF6
data register of Port_c[7..0]. Read and write
3FF7
data register of Port_c[15..8]. Read and write
3FF8
direction register of Port_c[7..0]. Write only
A ‘1’ in this register will set the corresponding pin of port_c to be output.
The default value for each bit is zero.
3FF9
direction register of Port_c[15..8]. Write only
A ‘1’ in this register will set the corresponding pin of port_c to be output.
The default value for each bit is zero.
3FFA
ADC register. Read only
When the timer b NMI occurs, the A/D conversion process starts and the S/H circuit stops
sampling and begins holding it until the ADC process is finished.
The ADC interrupt will be generated when ADC process is finished.
3FFB, 3FFC, 3FFD
….not used
3FFE
low byte of Voice channel 1, and system control 3. Write only
Bit 0: = 1 (Mix mode for DAC output)
0 (Separate mode for DAC output) (Default)
1: = 1 (Mix mode for PWM output)
0 (Separate mode for PWM output) (Default)
2: = not used (must be 0.)
3: = not used (must be 0.)
7-4: = low nibble byte of voice channel 1
3FFF
high byte of voice channel 1. Write only
The resolution of voice channel 1 is 12 bits ($3FFF and $3FFE bit7_4).
This register will be transferred to PWM port while timer_b NMI happen in a separate mode.