Programming interface – parallel mode, At89s52 – Rainbow Electronics AT89S52 User Manual
Page 18
AT89S52
18
Programming Interface – Parallel Mode
Every code byte in the Flash array can be programmed by
using the appropriate combination of control signals. The
write operation cycle is self-timed and once initiated, will
automatically time itself to completion.
All major programming vendors offer worldwide support for
the Atmel microcontroller series. Please contact your local
programming vendor for the appropriate software revision.
Notes:
1. Each PROG pulse is 200 ns - 500 ns for Chip Erase.
2. Each PROG pulse is 200 ns - 500 ns for Write Code Data.
3. Each PROG pulse is 200 ns - 500 ns for Write Lock Bits.
4. RDY/BSY signal is output on P3.0 during programming.
5. X = don’t care.
Figure 13. Programming the Flash Memory
(Parallel
Mode)
Figure 14. Verifying the Flash Memory (Parallel Mode)
Table 8. Flash Programming Modes
Mode
V
CC
RST
PSEN
ALE/
PROG
EA/
V
PP
P2.6
P2.7
P3.3
P3.6
P3.7
P0.7-0
Data
P2.4-0
P1.7-0
Address
Write Code Data
5V
H
L
(2)
12V
L
H
H
H
H
D
IN
A12-8
A7-0
Read Code Data
5V
H
L
H
H
L
L
L
H
H
D
OUT
A12-8
A7-0
Write Lock Bit 1
5V
H
L
(3)
12V
H
H
H
H
H
X
X
X
Write Lock Bit 2
5V
H
L
(3)
12V
H
H
H
L
L
X
X
X
Write Lock Bit 3
5V
H
L
(3)
12V
H
L
H
H
L
X
X
X
Read Lock Bits
1, 2, 3
5V
H
L
H
H
H
H
L
H
L
P0.2,
P0.3,
P0.4
X
X
Chip Erase
5V
H
L
(1)
12V
H
L
H
L
L
X
X
X
Read Atmel ID
5V
H
L
H
H
L
L
L
L
L
1EH
X 0000
00H
Read Device ID
5V
H
L
H
H
L
L
L
L
L
52H
X 0001
00H
Read Device ID
5V
H
L
H
H
L
L
L
L
L
06H
X 0010
00H
P1.0-P1.7
P2.6
P3.6
P2.0 - P2.4
A0 - A7
ADDR.
0000H/1FFFH
SEE FLASH
PROGRAMMING
MODES TABLE
3-33 MHz
P0
V
P2.7
PGM
DATA
PROG
V /V
IH
PP
V
IH
ALE
P3.7
XTAL2
EA
RST
PSEN
XTAL1
GND
V
CC
AT89S52
P3.3
P3.0
RDY/
BSY
A8 - A12
CC
P1.0-P1.7
P2.6
P3.6
P2.0 - P2.4
A0 - A7
ADDR.
0000H/1FFFH
SEE FLASH
PROGRAMMING
MODES TABLE
3-33 MHz
P0
P2.7
PGM DATA
(USE 10K
PULLUPS)
V
IH
V
IH
ALE
P3.7
XTAL 2
EA
RST
PSEN
XTAL1
GND
V
CC
AT89S52
P3.3
A8 - A12
V
CC