Atmega8, Register summary, Continued) – Rainbow Electronics ATmega8L User Manual

Page 7

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ATmega8

2486AS–08/01

Notes:

1. Refer to the USART description for details on how to access UBRRH and UCSRC.
2. For compatibility with future devices, reserved bits should be written to zero if accessed. Reserved I/O memory addresses

should never be written.

3. Some of the status flags are cleared by writing a logical one to them. Note that the CBI and SBI instructions will operate on

all bits in the I/O register, writing a one back into any flag read as set, thus clearing the flag. The CBI and SBI instructions
work with registers 0x00 to 0x1F only.

0x00 (0x20)

TWBR

2-wire Serial Interface Bit Rate Register

160

Register Summary

(Continued)

Address

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

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