Texas Instruments DMSoC Analog to Digital Converter Interface TMS320DM36x - Manual (Page 16)

3.9 AD2DAT
3.10 AD3DAT
3.11 AD4DAT
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Table 10. A/D Conversion Data 1 (AD1DAT) Field Descriptions
Bit Field Value Description
31-10 Reserved Any writes to these bit(s) must always have a value of 0.
9-0 AD1DAT A/D conversion data for channel 1
The A/D conversion data 2 (AD2DAT) register is shown in Figure 10 and described in Table 11 .
Figure 10. A/D Conversion Data 2 (AD2DAT) Register
31 10 9 0
Reserved AD2DAT
R-0 R-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 11. A/D Conversion Data 2 (AD2DAT) Field Descriptions
Bit Field Value Description
31-10 Reserved Any writes to these bit(s) must always have a value of 0.
9-0 AD2DAT A/D conversion data for channel 2
The A/D conversion data 3 (AD3DAT) register is shown in Figure 11 and described in Table 12 .
Figure 11. A/D Conversion Data 3 (AD3DAT) Register
31 10 9 0
Reserved AD3DAT
R-0 R-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 12. A/D Conversion Data 3 (AD3DAT) Field Descriptions
Bit Field Value Description
31-10 Reserved Any writes to these bit(s) must always have a value of 0.
9-0 AD3DAT A/D conversion data for channel 3
The A/D conversion data 4 (AD4DAT) register is shown in Figure 12 and described in Table 13 .
Figure 12. A/D Conversion Data 4 (AD4DAT) Register
31 10 9 0
Reserved AD4DAT
R-0 R-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Analog to Digital Converter (ADC) Interface 16 SPRUFI7 – March 2009
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