Intel PXA255 User Manual
Page 22

15-10 MMC_RESTO Bit Definitions.................................................................................................15-27
15-11 MMC_RDTO Register ...........................................................................................................15-28
15-12 MMC_BLKLEN Bit Definitions ...............................................................................................15-29
15-13 MMC_NOB Bit Definitions .....................................................................................................15-29
15-14 MMC_PRTBUF Bit Definitions...............................................................................................15-30
15-15 MMC_I_MASK Bit Definitions................................................................................................15-30
15-16 MMC_I_REG Bit Definitions ..................................................................................................15-32
15-17 MMC_CMD Register .............................................................................................................15-33
15-18 Command Index Values ........................................................................................................15-33
15-19 MMC_ARGH Bit Definitions...................................................................................................15-35
15-20 MMC_ARGL Bit Definitions ...................................................................................................15-35
15-21 MMC_RES, FIFO Entry .........................................................................................................15-36
15-22 MMC_RXFIFO, FIFO Entry ...................................................................................................15-36
15-23 MMC_TXFIFO, FIFO Entry....................................................................................................15-37
15-24 MMC Controller Registers .....................................................................................................15-37
16-1
16-10 NSSP Register Address Map ................................................................................................16-29
17-1
17-10 FCR Bit Definitions ................................................................................................................17-15
17-11 FOR Bit Definitions ................................................................................................................17-16
17-12 ABR Bit Definitions ................................................................................................................17-17
17-13 ACR Bit Definitions ................................................................................................................17-18
17-14 LCR Bit Definitions ................................................................................................................17-18
17-15 LSR Bit Definitions.................................................................................................................17-20
17-16 MCR Bit Definitions ...............................................................................................................17-22
17-17 MSR Bit Definitions................................................................................................................17-23
17-18 SCR Bit Definitions ................................................................................................................17-24
17-19 ISR Bit Definitions..................................................................................................................17-25
17-20 HWUART Register Locations ................................................................................................17-25