FUJITSU MPD3XXXAT - Manual (Page 149)

C141-E069-02EN 5 - 82
9) The device shall compare the CRC data received from the host with the results of its
own CRC calculation. If a miscompare error occurs during one or more Ultra DMA
bursts for any one command, at the end of the command, the device shall report the
first error that occurred (see 5.5.5).
10) The device shall release DDMARDY- within t
IORDYZ
after the host has negated
DMACK-.
11) The host shall neither negate STOP nor negate HSTROBE until at least t
ACK
after
negating DMACK-.
12) The host shall not assert DIOW-, CS0-, CS1-, DA2, DA1, or DA0 until at least t
ACK
after negating DMACK.
b) Device terminating an Ultra DMA data out burst
The following steps shall occur in the order they are listed unless otherwise specifically
allowed (see 5.6.3.11 and 5.6.3.2 for specific timing requirements):
1) The device shall not initiate Ultra DMA burst termination until at least one data word
of an Ultra DMA burst has been transferred.
2) The device shall initiate Ultra DMA burst termination by negating DDMARDY-.
3) The host shall stop generating an HSTROBE edges within t
RFS
of the device negating
DDMARDY-.
4) If the device negates DDMARDY- within t
SR
after the host has generated an
HSTROBE edge, then the device shall be prepared to receive zero or one additional
data words. If the device negates DDMARDY- greater than t
SR
after the host has
generated an HSTROBE edge, then the device shall be prepared to receive zero, one
or two additional data words. The additional data words are a result of cable round
trip delay and t
RFS
timing for the host.
5) The device shall negate DMARQ no sooner than t
RP
after negating DDMARDY-.
The device shall not assert DMARQ again until after the Ultra DMA burst is
terminated.
6) The host shall assert STOP with t
LI
after the device has negated DMARQ. The host
shall not negate STOP again until after the Ultra DMA burst is terminated.
7) If HSTROBE is negated, the host shall assert HSTROBE with t
LI
after the device has
negated DMARQ. No data shall be transferred during this assertion. The device shall
ignore this transition of HSTROBE. HSTROBE shall remain asserted until the Ultra
DMA burst is terminated.
8) The host shall place the result of its CRC calculation on DD (15:0) (see 5.5.5).
9) The host shall negate DMACK- no sooner than t
MLI
after the host has asserted
HSTROBE and STOP and the device has negated DMARQ and DDMARDY-, and no
sooner than t
DVS
after placing the result of its CRC calculation on DD (15:0).
10) The device shall latch the host's CRC data from DD (15:0) on the negating edge of
DMACK-.