Sundance SMT317 - Manual (Page 3)

Version 6.1 Page 3 of 24 SMT317 User Manual
Table of Contents
Revision History.......................................................................................................... 2
Table of Contents ....................................................................................................... 3
Table of figures........................................................................................................... 4
Table of tables ............................................................................................................ 4
Overview..................................................................................................................... 5
1. EMC................................................................................................................. 6
2. Power............................................................................................................... 6
3. Notational convention ...................................................................................... 6
4. Outline Description........................................................................................... 7
5. Power up sequence ......................................................................................... 8
6. ADC Sub-System............................................................................................. 8
6.1. Input Level ................................................................................................ 8
6.2. Output Codes............................................................................................ 8
7. Communication ports ....................................................................................... 9
7.1. Overview................................................................................................... 9
8. SDB ............................................................................................................... 10
9. Data formatting .............................................................................................. 10
10. Clock selection ........................................................................................... 11
10.1. ADCs Sampling clock.......................................................................... 11
10.2. SDB output clock................................................................................. 11
10.3. Overflowed FIFOs ............................................................................... 12
11. FPGA ......................................................................................................... 12
11.1. Fpga configuration .............................................................................. 12
12. ADCs Clock Source.................................................................................... 12
13. ADC Control ............................................................................................... 13
13.1. Programmable Clock Divider............................................................... 14
13.2. LED 1 .................................................................................................. 14
13.3. Synchronization signal ........................................................................ 14
13.4. Trigger................................................................................................. 14
13.5. Control register description ................................................................. 15
14. Connectors and Jumpers Positions............................................................ 17