Panasonic MN103001G/F01K - Manual (Page 381)

I/O Ports
15-15
15.4 Port 2
15.4.1 Block Diagram
Figs. 15-4-1 shows a block diagrams for port 2.
Fig. 15-4-1 Port 2 Block Diagram (P27 to P20)
Internal data bus
M
P
X P2n
(n=7,6,5,4,3,2,1,0)
P2OUT
D15(n=7)
to D8(n=0)
P2M
P2MD
P2DIR
P2nD
P2nO
P... Represents one bit of each register.
M
P
X
P2PU
P2nI
P2IN
D15 to D8
output enable
signal