Daewoo CP005P-010G1 - Manual (Page 14)

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ST92195B - GENERAL INFORMATION
Figure 1. ST92195 Block Diagram
MEM
ORY BUS
I/O
PORT 0
REG
ISTE
R BU
S
VOLTAGE
SYNTHESIS
PWM
D/A CON-
VERTER
SPI
I/O
PORT 4
I/O
PORT 5
Up to 64
Kbytes ROM
DATA
SLICER
& ACQUI-
SITION
UNIT
SYNC.
EXTRAC-
TION
Up to 8
Kbytes
TDSRAM
TRI
256 bytes
RAM
STANDARD
TIMER
TIMING AND
CLOCK CTRL
16-BIT
TIMER/
WATCHDOG
VPS/WSS
DATA
SLICER
I/O
PORT 2
ADC
CVBS1
I/O
PORT 3
SYNC
CONTROL
VSYNC
HSYNC/CSYNC
ON
SCREEN
DISPLAY
FREQ.
MULTIP.
PXFM
NMI
INT[7:4]
INT2
256 bytes
Register File
ST9+ CORE
8/16-bit
CPU
Interrupt
Management
RCCU
OSCIN
OSCOUT
RESET
RESETO
P0[7:0]
WSCR 1
WSCF 1
CVBS2
R/G/B/FB
PWM[7:0]
SDO/SDI
SCK
INT0
1
Not available on all devices.
STOUT
MMU
MCFM
TXCF
TSLU
AIN[4:1]
VSO[2:1]
EXTRG
P2[5:0]
P4[7:0]
P5[1:0]
P3[7:4]
CSO
HT
All alternate functions (Italic characters) are mapped on Ports 0, 2, 3, 4 and 5
2
8
4
6
8