IBASE MI941 - Manual (Page 28)

BIOS SETUP
24 MI941 User’s Manual
BIOS SETUP UTILITY
Main Advanced
PCIPnP Boot Security Chipset Exit
Configure advanced CPU settings
Configure CPU.
<- Select Screen
↑↓ Select Item
+- Change Field
Tab Select Field
F1 General Help
F10 Save and Exit
ESC Exit
Manufacturer: Intel
Intel® Core(TM)2 Duo CPU T9400 @ 2.66GHz
Frequency : 2.66GHz
FSB Speed : 1332MHz
Cache L1 : 128KB
Cache L2 : 6144KB
Ratio Actual Value: 8
Hardware Prefetcher [Enabled]
Adjacent Cache Line Prefetch [Enabled]
Max CPU ID Value Limit [Disabled]
Intel(R) Virtualization Tech [Enabled]
The CPU Configuration menu shows the following CPU details:
Manufacturer: the name of the CPU manufacturer
Brand String: the brand name of the CPU being used
Frequency: the CPU processing speed
FSB Speed: the FSB speed
Cache L1: the CPU L1 cache size
Cache L2: the CPU L2 cache
Hardware Prefetcher
The hardware prefetcher operates transparently, without programmer
intervention, to fetch streams of data and instruction from memory into
the unified second-level cache. The prefetcher is capable of handling
multiple streams in either the forward or backward direction. It is
triggered when successive cache misses occur in the last-level cache and
a stride in the access pattern is detected, such as in the case of loop
iterations that access array elements. The prefetching occurs up to a page
boundary.