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Appendix d

Page 40

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LV-67O User’s Manual

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40

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Optional :
-o 4E F2
-o 4F xx ; Data inversion register ; ‘1’ inverts the current valus

of the bits ,’0’ leaves them as they are

-o 4E 30
-o 4F 01 ; active GPIO’s

For further information, please refer to NCT6106D datasheet.

Appendix D

The watchdog timer makes the system auto-reset while it stops to work for a period.

The integrated watchdog timer can be setup as system reset mode by program.

Timeout Value Range
- 1 to 255
- Second or Minute
Program Sample

The integrated Watchdog Timer can be set up by programming.

-O 4E 87

Enter configuration

-O 4E 87

-O 4E 07

Logic Device Enable

-O 4F 08

-O 4E 30

WDT Enable

-O 4F 01

-O 4E F0

Set as Second*

-O 4F 00

-O 4E F1

-O 4F 0A

Set reset time 10 Sec