Dell POWEREDGE R620 - Manual (Page 7)

ONFI Backup Flash FPGA backs up DDR data
to this device in case of a
power failure Not WP. Not visible to
Host Processor Flash can be cleared
by powering up the
card and allowing the
controller to flush the
contents to VDs. If the
VDs are no longer
available, cache can be
cleared by going into
controller bios and
selecting Discard
Preserved Cache.
SDRAM ROC writes to this memory -
using it as cache for data IO
to HDDs Not WP. Not visible to
Host Processor Cache can be cleared
by powering off the
card
H310, H310M PERCs
NVSRAM ROC writes configuration
data to NVSRAM
Not WP. Not visible to
Host Processor Cannot be cleared with
existing tools available
to the customer
FRU Programmed at ICT during
production Not WP Cannot be cleared with
existing tools available
to the customer
1-Wire EEPROM ROC writes data to this
memory Not WP. Not visible to
Host Processor Cannot be cleared with
existing tools available
to the customer
SBR Pre-programmed before
assembly
Not WP. Not visible to
Host Processor Cannot be cleared with
existing tools available
to the customer
Flash Pre-programmed before
assembly. Can be updated
using Dell/LSI tools
Not WP. Not visible to
Host Processor Cannot be cleared with
existing tools available
to the customer
PCIe SSD Extension Card
Switch Configuration
EEPROM The EEPROM image is pre-
loaded at factory before
assembly. Once assembled
on the card, data can be
entered via PLX Device
Editor or PLX EEP DOS
based tool. Device can be write
protected via hardware
pin. Alternatively, device
contents can be write
protected via WPEN bit
in status register. System is not
functional as intended
if corrupted/removed.
IDSDM
SPI Flash SPI interface via iDRAC Hardware strapping Not user clearable
MCU USB interface via PCH N/A Not user clearable
NOTE: For any information that you may need, direct your questions to your Dell Marketing contact.
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