Bosch TTCAN - Manual (Page 18)

User’s Manual
BOSCH - 18/77 -
Revision 1.6 TTCAN
11.11.02
manual_about.fm
3.2.2 Status Register (addresses 0x03 & 0x02)
BOff Bus_Off Status
one
The CAN module is in Bus_Off state.
zero The CAN module is not Bus_Off.
EWarn Warning Status
one At least one of the error counters in the EML has reached the error warning
limit of 96.
zero Both error counters are below the error warning limit of 96.
EPass Error Passive
one The CAN Core is in the error passive state as defined in the CAN Specification.
zero The CAN Core is error active.
RxOk Received a Message Successfully
one
Since this bit was last reset (to zero) by the CPU, a message has been suc-
cessfully received (independent of the result of acceptance filtering).
zero Since this bit was last reset by the CPU, no message has been successfully
received. This bit is never reset by the CAN Core.
TxOk Transmitted a Message Successfully
one
Since this bit was last reset by the CPU, a message has been successfully
(error free and acknowledged by at least one other node) transmitted.
zero Since this bit was reset by the CPU, no message has been successfully trans-
mitted. This bit is never reset by the CAN Core.
LEC Last Error Code (Type of the last error to occur on the CAN bus)
0
No Error
1 Stuff Error : More than 5 equal bits in a sequence have occurred in a part of a
received message where this is not allowed.
2 Form Error : A fixed format part of a received frame has the wrong format.
3 AckError : The message this CAN Core transmitted was not acknowledged by
another node.
4 Bit1Error : During the transmission of a message (with the exception of the
arbitration field), the device wanted to send a
recessive level (bit of logical value
‘1’), but the monitored bus value was dominant.
5 Bit0Error : During the transmission of a message (or acknowledge bit, or
active error flag, or overload flag), the device wanted to send a
dominant level
(data or identifier bit logical value ‘0’), but the monitored bus value was reces-
sive. During Bus_Off recovery this status is set each time a sequence of 11
recessive bits has been monitored. This enables the CPU to monitor the pro-
ceeding of the Bus_Off recovery sequence (indicating the bus is not stuck at
dominant or continuously disturbed).
6 CRCError : The CRC check sum was incorrect in the message received, the
CRC received for an incoming message does not match with the calculated
CRC for the received data.
7 unused : When the LEC shows the value ‘7’, no CAN bus event was detected
since the CPU wrote this value to the LEC.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
res res res res res res res res BOff EWarn EPass RxOk TxOk LEC
r r r r r r r r r r r rw rw rw