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Chapter 2 – MSI X79A-GD45 User Manual

Page 59

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BIOS Setup

MS-7735

Chapter 2

2-11

BIOS Setup

MS-7735

Chapter 2

Adjusted CPU Frequency

It shows the adjusted CPU frequency. Read-only.

EIST

Enhanced Intel SpeedStep technology allows you to set the performance level of the

mcroprocessor whether the computer s runnng on battery or AC power. Ths field only

appears wth nstalled CPUs that support ths technology.

Intel Turbo Boost 2.0

Enables or dsables Intel Turbo Boost 2.0 whch automatcally boosts CPU performance

above rated specficatons (when applcatons requests the hghest performance state

of the processor).

Drect OC Button

Ths tem allows you to enable/dsable the Drect OC buttons.

DRAM Frequency

Ths tem allows you to adjust the DRAM frequency. Please note the overclockng

behavor s not guaranteed.

Extreme Memory Profile (X.M.P)

Ths tem s used to enable/dsable the Intel Extreme Memory Profile (XMP). For further

nformaton please refer to Intel’s offical webste.

Adjusted DRAM Frequency

It shows the adjusted DRAM frequency. Read-only.

DRAM Tmng Mode

Select whether DRAM tmng s controlled by the SPD (Seral Presence Detect) EE-

PROM on the DRAM module. Settng to [Auto] enables DRAM tmngs and the followng

“Advanced DRAM Configuraton” sub-menu to be determned by BIOS based on the

configuratons on the SPD. Selectng [Lnk] or [Unlnk] allows users to configure the

DRAM tmngs for each channel and the followng related “Advanced DRAM Configura-

ton” sub-menu manually.

Advanced DRAM Configuraton

Press to enter the sub-menu.

Command Rate

Ths settng controls the DRAM command rate.

tCL

Controls CAS latency whch determnes the tmng delay (n clock cycles) of startng

a read command after recevng data.

tRCD

Determnes the tmng of the transton from RAS (row address strobe) to CAS (col-

umn address strobe). The less clock cycles, the faster the DRAM performance.

tRP

Controls number of cycles for RAS (row address strobe) to be allowed to pre-charge.

If nsufficent tme s allowed for RAS to accumulate before DRAM refresh, the DRAM

may fal to retan data. Ths tem apples only when synchronous DRAM s nstalled

n the system.