5 チップセット, North bridge chipset configuration, Execute disable bit [enabled – Asus P5B Deluxe User Manual
Page 92: Hyper threading technology [enabled, Inter(r) speedstep (tm) tech. [disabled, 設定オプション：[disabled] [automatic
![5 チップセット, North bridge chipset configuration, Execute disable bit [enabled | Hyper threading technology [enabled, Inter(r) speedstep (tm) tech. [disabled, 設定オプション：[disabled] [automatic | Asus P5B Deluxe User Manual | Page 92 / 164](/screens/49149/92.png)
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