IEI Integration PXE-19S v4.00 - Manual (Page 3)

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10. PWR2, PWR3: AT +5V Power Connector
1 ■
2
●
3 ●
4 ●
5 ●
6 ●
11. J1, J2, J3: Write Protect Setup
J1、J2 and J3 are the EEPROM write protect pin of the PCI Express to
PCI Bridge will allow EEPROM normal read/write operations when J1、
J2 or J3 held high. When the Jump is brought low and the EEPROM
WPEN bit is “1”, all write operations to the status register are inhibited.
12. PCI routing table:
13. Notice:
a. Recommend to use 6mm width spacer to install
b. Torsion must less than 6lb-inch
1 2
■ ●
J1、J2、J3 DESCRIPTION
ON (Low) Write Inhibited
OFF (High)
Normal Read/Write
(default)
PIN DESCRIPTION
1 +5V
2 +5V
3 +5V
4 GND
5 GND
6
GND