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Demo transmitter tests, Transmitter tests, Qphy-pcie3 test descriptions – Teledyne LeCroy QPHY-PCIE3 User Manual

Page 18: Test 1.1 – tx equalization presets, Test 1.2 – vtx-fs-no-eq, Test 1.3 – vtx-eieos-rs/fs limits

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Demo Transmitter Tests

This configuration runs all the Transmitter tests (Tests 1.1 – 1.7 below, plus Test 1.4 the
Compliance Eye 8 GT/s test) using waveforms saved on the oscilloscope in D:\PCIe3\Demo
and the default limit set, Compliance Limits. This configuration is meant to easily demonstrate
the QPHY-PCIE3 capabilities when live signals cannot be tested. You will see dialogs and
connection diagrams similar to what you would see during an actual test.

Transmitter Tests

This configuration performs many of the measurements covered by the PCI Express Gen 3
base spec rev 3.0, ver 0.9. The limit set in use is Compliance Limits. All of the variables are set
to their default settings except that De-embed Fixture Breakout Channel is set to No. The tests
that are performed are:

• Test 1.1 – Tx Equalization Presets
• Test 1.2 – Vtx-fs-no-eq
• Test 1.3 – Vtx-eieos-rs/fs Limits
• Test 1.5 – 8 GT/s Tx Jitter Parameters
• Test 1.7 – Common Transmitter Parameters

o

Test 1.7.1 – UI

o

Test 1.7.2 – Vtx-cm-ac-pp and Vtx-dc-cm

o

Test 1.7.3 – Ltx-skew

QPHY-PCIE3 Test Descriptions

T

EST

1.1

T

X

E

QUALIZATION

P

RESETS

This test measures the transmitter's ability to output the proper amount of pre-shoot and de-
emphasis for a given preset as specified in the PCI Express Gen3 base spec section 4.3.3.5.2
rev 3.0, ver 0.9. Table 4-16 defines the pre-shoot and de-emphasis coefficients as well as the
tolerance for each preset. The measurement is made on the 1st block of the PCI Express Gen3
compliance pattern on UI 57-62 corresponding to the high and low parts of the pattern.

T

EST

1.2

V

TX

-

FS

-

NO

-

EQ

Transmitter Voltage Full Swing No Equalization. This test measures the transmitter's peak-to-
peak voltage with 0 dB of pre-shoot and de-emphasis. The measurement is made on the 1st
block of the PCI Express Gen3 compliance pattern on UI 57-62 corresponding to the high and
low parts of the pattern. See section 4.3.3.5.3 in base spec (ver 0.9, rev 3.0).

T

EST

1.3

V

TX

-

EIEOS

-

RS

/

FS

L

IMITS

Transmitter EIEOS Reduced Swing / Full Swing. This test measures the peak-to-peak EIEOS
reduced swing and full swing voltages. Accurately measuring the EIEOS voltage requires de-
embedding the breakout channel. The breakout channel's 4-port s-parameter file should be
provided for this test. See section 4.3.3.5.5 in base spec (ver 0.9, rev 3.0).

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922544 Rev A