Rainbow Electronics MAX5888 User Manual
Page 16
MAX5888
3.3V, 16-Bit, 500Msps High Dynamic
Performance DAC with Differential LVDS Inputs
16
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The MAX5888 is packaged in a 68-lead QFN-EP
package (package code: G6800-4), providing greater
design flexibility, increased thermal efficiency**, and
optimized AC performance of the DAC. The exposed
pad (EP) enables the user to implement grounding
techniques, which are necessary to ensure highest per-
formance operation. The EP must be soldered down
to AGND.
In this package, the data converter die is attached to
an EP lead frame with the back of this frame exposed at
the package bottom surface, facing the PC board side
of the package. This allows a solid attachment of the
package to the PC board with standard infrared (IR)
flow soldering techniques. A specially created land pat-
tern on the PC board, matching the size of the EP (6mm
✕
6mm), ensures the proper attachment and grounding
of the DAC. Designing vias*** into the land area and
implementing large ground planes in the PC board
design allow for highest performance operation of the
DAC. An array of at least 4
✕
4 vias (
≤0.3mm diameter
per via hole and 1.2mm pitch between via holes) is rec-
ommended for this 68-lead QFN-EP package.
Static Performance Parameter Definitions
Integral Nonlinearity (INL)
Integral nonlinearity is the deviation of the values on an
actual transfer function from either a best straight line fit
(closest approximation to the actual transfer curve) or a
line drawn between the end points of the transfer func-
tion, once offset and gain errors have been nullified. For
a DAC, the deviations are measured at every individual
step.
Differential Nonlinearity (DNL)
Differential nonlinearity is the difference between an
actual step height and the ideal value of 1 LSB. A DNL
error specification of less than 1 LSB guarantees no
missing codes and a monotonic transfer function.
FERRITE BEAD
AV
DD
1
µF
10
µF
47
µF
ANALOG POWER-
SUPPLY SOURCE
FERRITE BEAD
DV
DD
1
µF
10
µF
47
µF
DIGITAL POWER-
SUPPLY SOURCE
FERRITE BEAD
VCLK
1
µF
10
µF
47
µF
CLOCK POWER-
SUPPLY SOURCE
AV
DD
AGND
MAX5888
B0–B15
16
0.1
µF
DGND
0.1
µF
VCLK
CLKGND
0.1
µF
OUTP
OUTN
DV
DD
BYPASSING—DAC LEVEL
BYPASSING—BOARD LEVEL
Figure 13. Recommended Power-Supply Decoupling and Bypassing Circuitry
**Thermal efficiency is not the key factor, since the MAX5888 features low-power operation. The exposed pad is the key element to
ensure a solid ground connection between the DAC and the PC board’s analog ground layer.
***Vias connect the land pattern to internal or external copper planes. It is important to connect as many vias as possible to the analog
ground plane to minimize inductance.