5 i2c serial interface controller (master/slave), 1 introduction, I2c serial interface controller (master/slave) – Rainbow Electronics NUC130 User Manual
Page 36: Introduction, Nuc130 series data sheet

NUC130 Series DATA SHEET
5.5
I2C Serial Interface Controller (Master/Slave)
5.5.1
Introduction
I2C is a two-wire, bi-directional serial bus that provides a simple and efficient method of data 
exchange between devices. The I2C standard is a true multi-master bus including collision detection 
and arbitration that prevents data corruption if two or more masters attempt to control the bus 
simultaneously. Serial, 8-bit oriented bi-directional data transfers can be made up to 100kbit/s in 
Standard-mode, up to 400kbit/s in the Fast-mode, or up to 1.0 Mbit/s in the Fast-mode Plus. 
Data is transferred between a Master and a Slave synchronously to SCL on the SDA line on a byte-
by-byte basis. Each data byte is 8 bits long. There is one SCL clock pulse for each data bit with the 
MSB being transmitted first. An acknowledge bit follows each transferred byte. Each bit is sampled 
during the high period of SCL; therefore, the SDA line may be changed only during the low period of 
SCL and must be held stable during the high period of SCL. A transition on the SDA line while SCL is 
high is interpreted as a command (START or STOP). Please refer to Figure 5-10 for more detail I2C 
BUS Timing. 
t
BUF
STOP
SDA
SCL
START
t
HD;STA
t
LOW
t
HD;DAT
t
HIGH
t
f
t
SU;DAT
Repeated
START
t
SU;STA
t
SU;STO
STOP
t
r
Figure 5-10 I2C Bus Timing
The device’s on-chip I2C logic provides the serial interface that meets the I2C bus standard mode 
specification. The I2C port handles byte transfers autonomously. To enable this port, the bit ENS1 in 
I2CON should be set to '1'. The I2C H/W interfaces to the I2C bus via two pins: SDA (Px.y, serial data 
line) and SCL (Px.y, serial clock line). Pull up resistor is needed for Pin Px.y and Px.y for I2C 
operation as these are open drain pins. When the I/O pins are used as I2C port, user must set the pins 
to logic high in advance. 
Publication Release Date: May 31, 2010
- 36 -
Revision V1.02
