Table 3. command byte definition – Rainbow Electronics MAX7470 User Manual
Page 12
MAX7469/MAX7470
HDTV Continuously Variable
Anti-Aliasing Filters
12
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Command Byte (Write Cycle)
A write cycle begins with the bus master issuing a
START condition followed by 7 address bits (Figure 5)
and 1 write bit (R/W = 0). After successfully receiving its
address, the MAX7469/MAX7470 (slave) issue an ACK.
The slave recognizes the next byte after a successfully
received address as the command byte (Table 3).
Use the command byte to configure the MAX7469/
MAX7470. While most of the commands listed in Table
3 modify the functionality of the MAX7469/MAX7470,
some commands prepare the device for further data
transfers (see the
Control/Status Register
and
Frequency Register
sections). If the write cycle is pre-
maturely aborted, the register is not updated, and the
COMMAND BYTE:
INDIVIDUAL BIT DEFINITIONS
C7
C6
C5
C4
C3
C2
C1
C0
DESCRIPTION
0
0
0
0
0
0
0
0
Enters power-down mode.
0
0
0
0
0
0
0
1
Wake-up; resumes normal operation using the frequency/status previously stored
(unless power has been cycled).
0
0
0
0
0
0
1
0
Sets IN1 clamp voltage level to low.
0
0
0
0
0
0
1
1
Sets IN1 clamp voltage level to high.
0
0
0
0
0
1
0
0
Sets IN2 clamp voltage level to low.
0
0
0
0
0
1
0
1
Sets IN2 clamp voltage level to high.
0
0
0
0
0
1
1
0
Sets IN3 clamp voltage level to low.
0
0
0
0
0
1
1
1
Sets IN3 clamp voltage level to high.
0
0
0
0
1
0
0
0
Selects component input, color-burst filter disabled.
0
0
0
0
1
0
0
1
Selects composite input, color-burst filter enabled.
0
0
0
0
1
0
1
0
Selects internal sync.
0
0
0
0
1
0
1
1
Selects external sync.
0
0
0
0
1
1
0
0
Selects positive polarity external sync.
0
0
0
0
1
1
0
1
Selects negative polarity external sync.
0
0
0
0
1
1
1
0
Enables filters.
0
0
0
0
1
1
1
1
Disables filters, enters bypass mode.
0
0
0
1
0
0
0
0
Resets the control/status register to the default values as described in the Control/
Status Register section. This command does not affect the frequency register.
0
0
0
1
0
0
0
1
Requests a control/status register read. The interface expects an Sr condition to
follow with address and read/write set to read so data can be driven onto the bus.
0
0
0
1
0
0
1
0
Loads the frequency register with the data byte following the command byte.
0
0
0
1
0
0
1
1
Requests a frequency register read. The interface expects an Sr condition to follow
with address and read/write set to read so data can be driven onto the bus.
Table 3. Command Byte Definition