Xilinx Frequency Generator for Spartan-3E Starter Kit - Manual (Page 6)

Frequency Generator for the Spartan-3E Starter Kit 6
Design Files
The source files provided for the reference design are…..
frequency_generator.vhd
Top level file and main description of hardware.
Contains I/O required to disable StrataFLASH memory device on the board which may
otherwise interfere with the LCD display.
PicoBlaze program source assembler code
kcpsm3.vhd PicoBlaze processor for Spartan-3E devices.
fg_ctrl.vhd
frequency_generator.ucf
I/O constraints file for Spartan-3E Starter Kit
Timing specifications for 50MHz PicoBlaze controller 200MHz DDS circuits.
Location constraint for DCM used for Jitter reduction.
fg_ctrl.psm
Assembled program for PicoBlaze (stored in a Block memory)
Note: The file shown in green is not included with the reference design as it is provided with PicoBlaze download. Please visit the PicoBlaze Web site
for your free copy of PicoBlaze, assembler, JTAG_loader and documentation.
www.xilinx.com/picoblaze
Hint – The JTAG_Loader utility supplied with PicoBlaze has been included in this design. This enables the new programs to be written for PicoBlaze
using the configuration file provided.
This design contains an otherwise undocumented and unspecified mode of
operation for a DCM. Before this design can be processed a special BITGEN option
needs to be set. Please read the notes provided on page 13 as well as those
contained in ‘frequency_generator.vhd' for details of this special requirement.
Hint – You do not need PicoBlaze if you use this design as the basis for implementing a fixed frequency module. However, I’m sure you will want
PicoBlaze for other parts of your design now that you have seen what it is capable of doing .