Toshiba IK-TF7 - Manual (Page 32)

32
8. INPUT OUTPUT SIGNAL SPECIFICATOINS
4.5V HD
VD
0V
4.5V
0V
( 1 ) HD/VD Output Amplitude Specifications ( 4 ) HD Input Specifications
The amplitude level is the representative value when
terminated with 10k
Ω
.
Output is enabled when the internal switch SJ01 is set
to the OUT side.
( 2 ) VD Input Specifications
* Input impedance: 75W or 1k
Ω
or greater
* Input amplitude 2.0 to 5.0 V(p-p) (75
Ω
termination ON
or OFF)
* Voltage and pulse width were measured at RGB con-
nector located on the rear panel.
2.0
µ
s to 5.0
µ
s
2.0 to
5.0 V(p-p)
( 3 ) VIDEO INDEX Output Specifications
The amplitude level is the representative value when
terminated with 10kW.
4.5V
0V
796H (Partial scanning OFF)
387H (Partial scanning 60fps)
258H (Partial scanning 90fps)
* Input impedance: 75
Ω
or 10k
Ω
or greater
* Input amplitude 2.0 to 5.0 Vp-p (75
Ω
termination ON
or OFF)
* Voltage and pulse width were measured at RGB con-
nector located on the rear panel.
( 5 ) Trigger Pulse Specifications
2 5.0V
0 0.4V
(Positive polarity mode)
2 5.0V
0 0.4V
(Negative polarity mode)
More than 2
µ
s
More than 2
µ
s
5H to 21H
2.0 to
5.0 V(p-p)
* Input impedance: 10k
Ω
or greater
* Voltage and pulse width were measured at RGB
connector located on the rear panel.
( 6 ) External HD/VD Input Phase Specifications
100 100
External HD
rising edge
Center
Unit : Clock
1 clk=33.9nsec
External HD
The phase relationship of the external HD and VD should correspond to the center phase (i.e., the external HD falling
edge) as illustrated in the above diagram.
External VD falling edge:
Please input within about 100 clock cycles of the standard center phase.
Note that V sync of the video is output with a delay of about 1H from the external VD at the time of reset-restart and
the external trigger mode.
In the normal mode:
Continuously with the HD period of 43.05
µ
s and VD period of 34.27 ms (partial scanning 60fps: 16.67 ms, partial
scanning 90fps: 11.11 ms ).
Phase timing is as illustrated in the above diagram (with only the falling edge applicable).
In the reset-restart/external trigger mode:
Continuously with the HD period of 43.05
µ
s. VD (reset) is at an arbitrary timing with the phase of HD being within the
standard of the above diagram.