NEC 1000 Series - Manual (Page 3)

3
Mainframe-class RAS features
Reliability / Availability
• Dual-Core Intel ® Itanium ® processor:
Error handling of hardware and operating system through Machine Check Architecture (MCA)
• Memory mirroring: Continuous operation even in the event of a non-correctable error
• Partial Chipset degradation: Avoid multi-partition shutdowns resulting from chipset failures
• Highly Available Center Plane: System restoration after the replacement of a failed crossbar
no longer requires a system shutdown
• Complete modularization and redundancy: Improvements in fault resilience,
continuous operation and serviceability
• Clock modularization, redundancy and 16 processor domain segmentation:
Minimizes downtime, and avoids multi partition shutdown due to clock failure
• Diagnostics of the error detection circuits: Substantial strengthening of data integrity
• Enhanced error detection of the high-speed interconnect:
Intricate error handling through multi bit error detection and retransmission of error data
• Two independent power sources: Avoid system shutdown due to failures of the power distribution units
Serviceability
• Autonomic reporting of logs with pinpoint prognosis of failed components allow for the realization of
mainframe-class platform serviceability
n System Hardware Layout of the Express5800/1000
Series Server (1320Xf)
* Redundant
configuration
available
Fan box
Cell card
PCI box
Power Bay
Service
Processor * 1
Clock card * 1
HDD Bay
Power
Distribution
Unit (PDU)
Fan box
Crossbar
card
PCI slots
Hot Pluggable * 2
Fully
Redundant
N+1
Redundant
*1 Redundancy is optional
*2 Ability to replace a failed component
without shutting down other partitions
* Redundant
configuration
available
Increased inter-Cell data transfer speeds
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Memory Memory
A 3 Chipset
Processor
Processor
Processor
Processor
Cell Controller
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n Internal Connections of the
Express5800/1000 Series
Service Processor
Clock card
HDD Bay
Power Distribution Unit
Power Bay Fan box
Cell card
PCI box
Crossbar card
PCI slots