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Frequency offsets - fcc (u.s.a.) block diagram – Pico Macom PIDA-550 User Manual

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PICO MACOM, INC.

12500 Foothill Blvd. • Lakeview Terrace, CA 91342 • (818) 897-0028 • (800) 421-6511 • FAX (818) 834-7197

5

D E S C R I P T I O N S

FREQUENCY OFFSETS - FCC (U.S.A.)

Block Diagram

NOTES:
1. FOR PASSIVE RETURN, CONNECT J3 TO P1 AND P4.
2. FOR ACTIVE RETURN, CONNECT J1 TO P1 AND P2 ANDJ2 TO P3 AND P4
3. PLUG-IN EQUALIZERS AND ATTENUATORS ARE OPTIONAL. IF PLUG-INS ARE TO BE USED

REMOVE JUMPER WIRE AT APPROPRIATE LOCATION AND INSERT PLUG-IN

HYBRID AMP

1

GAIN CONTROL

CIRCUIT

FULL

SLOPE CONTROL

CIRCUIT

FLAT

HYBRID AMP

2

GAIN CONTROL

CIRCUIT

FULL

ATT.

RF OUTPUT

RETURN PATH INPUT

P1

P2

P3

P4

P

ASSIVE RETURN

J1

J2

RF INPUT
RETURN PATH OUTPUT

TEST PORT

(-30dB)

W2

W3

W8

J3

49 MHz

HPF

36 MHz

LPF

TEST PORT

(-30dB)

ATT.

49 MHz

HPF

36 MHz

LPF

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