Panasonic PanaXSeries MN103S65G - Manual (Page 11)

2-4 A 8-bit 16-bit timer, a peripheral initial
TM7MD: Timer 7 mode register
Bit7 : Timer operation permission
0: Stop of operation
1: Permission of operation
Bit6 : Timer initialization
0: Usually, operation
1: Initialization
The value of a base register is loaded to a binary counter.
The timer pulse output 7 is reset on a low level.
Bit5-3: Prohibition (0 fixation)
Bit2-0: Clock source selection
000:IOCLK
001:IOCLK/8
010:IOCLK/32
011: Cascade connection with a timer 6
100: Timer 4 underflow
101: Timer 5 underflow
110: Timer 6 underflow
111: TM7IN terminal input
TMMPSC: Prescaler mode register
Bit7 : Count operation permission
0: Stop of operation
1: Permission of operation
To use 1/8SYSCLK, and 1/32SYSCLK, a Prescaler control register needs to be set up.
When a TMnIO terminal input is chosen, the rising edge of a terminal input is counted.
TMEXPSC8: External Prescaler control register
Bit03-01: Count source selection (timers 0, 2, and 4)
0:TMINn terminal input
1:IOCLK/128
Bit00 : Prescaler (1 / 128 operation permission)
0: Stop of operation
1: Permission of operation
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