Pixel input register, Pixel formatter, Colour space converter – Sundance SMT319 User Manual
Page 18: Threshold, Fifo buffer(s), Emif controller
Version 1.0.7
Page 18 of 45
SMT319 User Manual
With the maximum PAL resolution of 768x576 with 16 bits per pixel (YCrCb 4:2:2), a
full frame will consume 884736 bytes thus allowing for 37 complete frames to be
stored. Using QCIF NTSC square pixels, each frame is only 19200 bytes and a total
of 1747 colour frames can be stored.
An explanation of each functional block of the diagram follows.
Pixel Input Register
The 16-bit data from the Bt829B is input to the FPGA and latched in this register
using the QCLK signal.
Pixel Formatter
This creates an internal 24-bit sample with each Y value being accompanied by a Cr
and Cb value. Data from the Bt829B is in the form of YCb, YCr, YCb, YCr, etc. The
formatter will create samples in which the Cb and Cr values will be identical between
successive Y values.
Colour Space Converter
*
This converter will take YCbCr pixels and convert these to 24-bit computer RGB
values, or 16-bit 565 RGB values.
Threshold
*
This operation basically performs a translation on the 8-bit Y value. The translation is
accomplished by inputting the Y value into a LUT (look-up table) and the transformed
value is then output. The LUT must be programmed by the DSP, and can be altered
at any time. If this feature is not required, then a ramp (0,1,2, etc) must be
programmed.
FIFO Buffer(s)
This FIFO is used to remove the necessity for the EMIF to continually access
SDRAM to store or retrieve pixels. The FIFO can store a whole video line.
EMIF Controller
This is responsible for transferring the video data (both grabbed and for display) to
the DSP’s EMIFA.
*
not available in the first release of the SMT319