Dip switch settings – AJA HD10AM User Manual
Page 10
HD10AM Mini-Converter v1.0r2
www.aja.com
10
DIP Switch Settings
DIP switch settings used to configure various functions are described below.
Table 1. HD10AM DIP Switch Setting Descriptions
SWITCH
FUNCTION
DIP Set LEFT (default)
DIP Set RIGHT
1
Audio Embedding
for Channels 1/2
(EMBD 1/2)
(ON) Overwrite or embed new channel
1/2 packets.
(OFF) If AUX (SW 8) is also Left (OFF): Pass any
channel 1/2 packets from input SDI.
If AUX (SW 8) is Right (ON): Delete all packets
from input SDI.
2
Audio Embedding
for Channels 3/4
(EMDB 3/4)
(ON) Overwrite or embed new channel
3/4 packets.
(OFF) If AUX (SW 8) is also Left (OFF): Pass any
channel 3/4 packets from input SDI.
If AUX (SW 8) is Right (ON): Delete all packets
from input SDI.
3
Audio Embedding
for Channels 5/6
(EMDB 5/6)
(ON) Overwrite or embed new channel
5/6 packets.
(OFF) If AUX (SW 8) is also Left (OFF): Pass any
channel 5/6 packets from input SDI.
If AUX (SW 8) is Right (ON): Delete all packets
from input SDI.
4
Audio Embedding
for Channels 7/8
(EMDB 7/8)
(ON) Overwrite or embed new channel
7/8 packets.
(OFF) If AUX (SW 8) is also Left (OFF): Pass any
channel 7/8 packets from input SDI.
If AUX (SW 8) is Right (ON): Delete all packets
from input SDI.
5
Channel Mapping
For Embedded
Groups
(EMBD GRP)
Embed to Groups 1/2 as specified in
272M and 299M
Embed to Groups 3/4 as specified in 272M
and 299M
Table 2, “DIP SW 5 Embedded Channel Mapping,” on page 11
6
Channel Mapping
For Disembedding
Groups
(DISEMBD GRP)
Disembed from Groups 1/2 as specified
in 272M and 299M)
Disembed from Groups 3/4 as specified in
272M and 299M
Refer to
Table 3, “DIP SW 6 Disembedded Input Channel Mapping,” on page 12
7
(SRC) Pass input
AES audio through
the sample rate
converters
(ON) Pass all input AES audio through
the sample rate converter before
embedding (for example, PCM audio)
(OFF) Do not pass any input AES audio
through the sample rate converter before
embedding (for example, Dolby® Digital from
a synchronous source)
NOTE: Switch 7 affects all four inputs. For proper operation with the SRC OFF, the AES
input timing must be externally synchronized to the input SDI.
8
(AUX) Delete
ancillary data from
input (affects DIP
SW 1-4 functions)
(OFF) Whenever possible (i.e., when
audio packets for that group are not
being embedded), preserve and pass all
incoming ancillary data except packets
marked for deletion
(ON) Delete all incoming horizontal and
vertical ancillary data before embedding any
new audio packets