Motorola MPC8260 - Manual (Page 26)

xxvi MPC8260 PowerQUICC II UserÕs Manual MOTOROLA
CONTENTS
Paragraph
Number
Title
Page
Number
29.3.6 Determining the Priority of an ATM Channel .............................................29-13
29.4 VCI/VPI Address Lookup Mechanism.............................................................29-14
29.4.1 External CAM Lookup .................................................................................29-14
29.4.2 Address Compression ...................................................................................29-15
29.4.2.1 VP-Level Address Compression Table (VPLT) ......................................29-17
29.4.2.2 VC-Level Address Compression Tables (VCLTs) ..................................29-18
29.4.3 Misinserted Cells ..........................................................................................29-18
29.4.4 Receive Raw Cell Queue..............................................................................29-19
29.5 Available Bit Rate (ABR) Flow Control ..........................................................29-20
29.5.1 The ABR Model ...........................................................................................29-20
29.5.1.1 ABR Flow Control Source End-System Behavior ...................................29-21
29.5.1.2 ABR Flow Control Destination End-System Behavior............................29-21
29.5.1.3 ABR Flowcharts .......................................................................................29-22
29.5.2 RM Cell Structure.........................................................................................29-25
29.5.2.1 RM Cell Rate Representation...................................................................29-26
29.5.3 ABR Flow Control Setup .............................................................................29-27
29.6 OAM Support ...................................................................................................29-27
29.6.1 ATM-Layer OAM Definitions .....................................................................29-27
29.6.2 Virtual Path (F4) Flow Mechanism ..............................................................29-28
29.6.3 Virtual Channel (F5) Flow Mechanism........................................................29-28
29.6.4 Receiving OAM F4 or F5 Cells....................................................................29-28
29.6.5 Transmitting OAM F4 or F5 Cells ...............................................................29-29
29.6.6 Performance Monitoring ..............................................................................29-29
29.6.6.1 Running a Performance Block Test..........................................................29-30
29.6.6.2 PM Block Monitoring ..............................................................................29-30
29.6.6.3 PM Block Generation ...............................................................................29-31
29.6.6.4 BRC Performance Calculations................................................................29-32
29.7 User-Defined Cells (UDC) ...............................................................................29-32
29.7.1 UDC Extended Address Mode (UEAD) ......................................................29-33
29.8 ATM Layer Statistics........................................................................................29-33
29.9 ATM-to-TDM Interworking.............................................................................29-34
29.9.1 Automatic Data Forwarding .........................................................................29-34
29.9.2 Using Interrupts in Automatic Data Forwarding..........................................29-35
29.9.3 Timing Issues................................................................................................29-36
29.9.4 Clock Synchronization (SRTS and Adaptive FIFOs) ..................................29-36
29.9.5 Mapping TDM Time Slots to VCs ...............................................................29-36
29.9.6 CAS Support.................................................................................................29-36
29.9.7 Trunk Condition ...........................................................................................29-37
29.9.8 ATM-to-ATM Data Forwarding ..................................................................29-37
29.10 ATM Memory Structure...................................................................................29-37
29.10.1 Parameter RAM............................................................................................29-37
29.10.1.1 Determining UEAD_OFFSET (UEAD Mode Only) ...............................29-40
29.10.1.2 VCI Filtering (VCIF)................................................................................29-40