Cirrus Logic CS8420 - Manual (Page 47)

DS245F4 47
CS8420
10.19 Sample Rate Ratio (1Eh) (Read Only)
The Sample Rate Ratio is Fso divided by Fsi. This value is represented as an integer and a
fractional part. The value is meaningful only after the both the PLL and SRC have reached lock,
and the SRC output is being used
SRR[7:6 The integer part of the sample rate ratio
SRR[5:0] The fractional part of the sample rate ratio
10.20 C-Bit or U-Bit Data Buffer (20h - 37h)
Either channel status data buffer E or user data buffer E (provided UBM bits are set to block mode) is ac-
cessible via these register addresses.
10.21 CS8420 I.D. and Version Register (7Fh) (Read Only)
ID[3:0] ID code for the CS8420. Permanently set to 0001
VER[3:0] CS8420 Revision Level:
Revision B is coded as 0001
Revision C is coded as 0011
Revision D is coded as 0100
7 6 5 4 3 2 1 0
SRR7 SRR6 SRR5 SRR4 SRR3 SRR2 SRR1 SRR0
7 6 5 4 3 2 1 ID3
ID3 ID2 ID1 ID0 VER3 VER2 VER1 VER0