Cirrus Logic CDB43L22 User Manual
Cdb43l22, Evaluation board for cs43l22, Features

Copyright
© Cirrus Logic, Inc. 2007
(All Rights Reserved)
Evaluation Board for CS43L22
Features
Analog Passthrough Input
– Four Stereo Line Input Jacks
– Channel Mixer
Analog Output
– Stereo Headphone Jack w/ HP Detect
Capability
– Speaker Output via Differential Stereo
PWM Terminals and Audio Jacks
8- to 96-kHz S/PDIF Interface
– Optical and RCA S/PDIF Input Jacks
– CS8416 Digital Audio Receiver
I/O Stake Headers
– External Control Port Accessibility
– External DSP Serial Audio I/O Accessibility
Multiple Power Supply options via Battery or
External Power Supplies.
1.8 V to 3.3 V Logic Interface
FlexGUI S/W Control - Windows
®
Compatible
– Pre-Defined & User-Configurable Scripts
Description
Using the CDB43L22 evaluation board is an ideal way
to evaluate the CS43L22. Use of the board requires an
analog/digital signal source, an analyzer and power
supplies. A Windows
PC-compatible computer is also
required in order to configure the CDB43L22.
System timing can be provided by the CS8416, by the
CS43L22 with supplied master clock, or via an I/O stake
header with a DSP connected. 1/8th inch audio jacks
are provided for the analog passthrough inputs and
HP/Line outputs. Two pairs of banana jacks and an ad-
ditional pair of 1/8th inch audio jacks are provided to
monitor the stereo differential speaker PWM output
from the CS43L22. Digital input connections are via
RCA phono or optical connectors to the CS8416
(S/PDIF Rx).
The Windows-based software GUI provided makes
configuring the CDB43L22 easy. The software commu-
nicates through the PC’s USB port to configure the
board and FPGA registers so that all features of the
CS43L22 can be evaluated. The evaluation board may
also be configured to accept external timing and data
signals for operation in a user application during system
development.
ORDERING INFORMATION
CDB43L22
Evaluation Board
USB
µ controller
CS43L22
S/PDIF Input
(CS8416)
PSIA Input
Header
FPGA
Oscillator
(socket)
I
2
C Interface
Reset
Reset
PLL
Clk/Data
SRC
(CS8421)
Analog Output
(Line + Headphone)
Speaker
Outputs
Analog
Passthrough
Input
External System
Input Header
OCTOBER '07
DS792DB1
CDB43L22
Document Outline
- 1. System Overview
- 2. Quick Start Guide
- 3. Configuration Options
- 4. Software Mode Control
- 5. System Connections and Jumpers
- 6. Jumper Settings
- 7. CDB43L22 Block Diagram
- 8. CDB43L22 Schematics
- 9. CDB43L22 Layout
- 10. Performance Plots
- Figure 19. FFT - S/PDIF Input to HP Output @ -1 dBFS
- Figure 20. FFT - S/PDIF Input to HP Output @ -60 dBFS
- Figure 21. THD+N vs. HP Output Power
- Figure 22. Freq. Resp. - S/PDIF Input to HP Output
- Figure 23. THD+N - S/PDIF Input to HP Output
- Figure 24. Dynamic Range- S/PDIF Input to HP Output
- Figure 25. FFT - S/PDIF In to Speaker Out @ 0 dBFS
- Figure 26. FFT - S/PDIF In to Speaker Out @ -60 dBFS
- Figure 27. Frequency Response - S/PDIF In to Speaker Out
- Figure 28. THD+N - S/PDIF In to Speaker Out
- Figure 29. THD+N vs. Output Power (Stereo)
- Figure 30. THD+N vs. Output Power (Mono)
- 11. Revision History