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Table 8. slot mapping for the cs4202, Table 9. slot assignment defaults, 12 extended audio id register (index 28h) – Cirrus Logic CS4202 User Manual

Page 30: Cs4202

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CS4202

30

DS549PP2

4.12

Extended Audio ID Register (Index 28h)

ID[1:0]

Codec ID. These bits indicate the current codec configuration. When ID[1:0] = 00, the

CS4202 is the primary audio codec. When ID[1:0] = 01, 10, or 11, the CS4202 is a secondary
audio codec. The state of the ID[1:0] bits is determined at power-up from the ID[1:0]# pins
and the current clocking scheme, see Table 18 on page 49.

REV[1:0]

AC ’97 Revision. The REV[1:0] bits indicate which version of the AC ’97 specification the co-

dec complies with. These bits always return ‘01’, indicating the CS4202 complies with
version 2.2 of the AC ’97 specification.

AMAP

Audio Slot Mapping. The AMAP bit indicates whether the AC ’97 2.2 compliant AC-link slot to

audio DAC mapping is supported. This bit always returns ‘1’, indicating that audio slot map-
ping is supported. The PCM playback and capture slots are mapped according to Table 8 on
page 30.

DSA[1:0]

DAC Slot Assignment. The DSA[1:0] bits control the mapping of output slots to the DAC/SRC

block as well as the serial data port. To satisfy AC ‘97 2.2 AMAP requirements, the default for
these bits will depend on the Codec ID as shown in Table 9. See Table 8 for all available Slot
Map settings.

SPDIF

Sony/Philips Digital Interface. The SPDIF bit is ‘set’, indicating that the optional S/PDIF trans-

mitter is supported.

VRA

Variable Rate PCM Audio. The VRA bit indicates whether variable rate PCM audio is support-

ed. This bit always returns ‘1’, indicating that variable rate PCM audio is available.

Default

x605h. The Extended Audio ID Register (Index 28h) is a read-only register, except for the

DSA[1:0] bits which are read/write.

D15

D14

D13

D12

D11

D10

D9

D8

D7

D6

D5

D4

D3

D2

D1

D0

ID1

ID0

0

0

REV1 REV0 AMAP

0

0

0

DSA1 DSA0

0

SPDIF

0

VRA

Slot Assignment

Slot Mapping

DSA1

SPSA1

ASA1

DSA0

SPSA0

ASA0

DAC

SDOUT

SDO2

S/PDIF

ADC

L

R

L

R

L

R

L

R

L

R

0

0

3

4

7

8

6

9

3

4

3

4

0

1

7

8

6

9

10

11

7

8

7

8

1

0

6

9

10

11

-

-

6

9

6

11

1

1

10

11

-

-

-

-

10

11

-

-

Table 8. Slot Mapping for the CS4202

Codec ID

DSA[1:0]

default

SPSA[1:0]

default

ASA[1:0]

default

0

00

01

00

1

01

10

00

2

01

10

00

3

10

11

00

Table 9. Slot Assignment Defaults