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Read/write time slot timing diagram figure 14, Read time slots – Rainbow Electronics DS1822 User Manual

Page 15

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DS1822

15 of 20

The DS1822 samples the 1-wire bus during a window that lasts from 15

µ

s to 60

µ

s after the master

initiates the write time slot. If the bus is high during the sampling window, a 1 is written to the DS1822.
If the line is low, a 0 is written to the DS1822.

READ/WRITE TIME SLOT TIMING DIAGRAM Figure 14






























READ TIME SLOTS

The DS1822 can only transmit data to the master when the master issues read time slots. Therefore, the
master must generate read time slots immediately after issuing a Read Scratchpad [BEh] or Read Power
Supply [B4h] command, so that the DS1822 can provide the requested data. In addition, the master can
generate read time slots after issuing Convert T [44h] or Recall E

2

[B8h] commands to find out the status

of the operation as explained in the DS1822 FUNCTION COMMAND section.

All read time slots must be a minimum of 60

µ

s in duration with a minimum of a 1

µ

s recovery time

between slots. A read time slot is initiated by the master device pulling the 1-wire bus low for a
minimum of 1

µ

s and then releasing the bus (see Figure 14). After the master initiates the read time slot,

the DS1822 will begin transmitting a 1 or 0 on bus. The DS1822 transmits a 1 by leaving the bus high
and transmits a 0 by pulling the bus low. When transmitting a 0, the DS1822 will release the bus by the
end of the time slot, and the bus will be pulled back to its high idle state by the pullup resister. Output

45

µµµµ

s

15

µµµµ

s

V

PU

GND

1-WIRE BUS

60

µµµµ

s < T

X

“0” < 120

1

µµµµ

s < T

REC

<

DS1822

Samples

MIN TYP MAX

15

µµµµ

s

30

µµµµ

s

> 1

µµµµ

s

MASTER WRITE “0” SLOT

MASTER WRITE “1” SLOT

V

PU

GND

1-WIRE BUS

15

µµµµ

s

MASTER READ “0” SLOT

MASTER READ “1” SLOT

Master samples

Master samples

START

OF SLOT

START

OF SLOT

> 1

µµµµ

s

1

µµµµ

s < T

REC

<

15

µµµµ

s

15

µµµµ

s

30

µµµµ

s

15

µµµµ

s

DS1822

Samples

MIN TYP MAX

LINE TYPE LEGEND

Bus master pulling low

DS1822 pulling low

Resistor

pullup

> 1

µµµµ

s